1. Field of the Invention
This invention relates to a semiconductor device, in particular to a semiconductor device having a flip-chip structure wherein a resin is filled in a space between a semiconductor chip and a wiring circuit board for improving the reliability of connection of a bump electrode.
2. Description of the Related Art
In a tendency of further increasing the integration density of semiconductor device in recent years, it is now also demanded to increase the density in mounting of semiconductor devices. Under the circumstances, a flip-chip mounting technique as shown in FIG. 1 (for example, U.S. Pat. No. 3,401,126 or U.S. Pat. No. 3,429,040) is now extensively utilized, in addition to a wire-bonding technique and a TAB technique, in various electronic fields such as a computer apparatus.
Since the coefficient of thermal expansion of a semiconductor chip substantially differs in general from that of a wiring circuit board, a displacement is caused to occur between the semiconductor chip and the wiring circuit board due to a heat generating during the operation of the semiconductor chip as the heat thus generated is transferred via a bump electrode to the wiring circuit board. This displacement brought about by the heat then cause a stress distortion on the bump electrode disposed to connect the semiconductor chip with the wiring circuit board, giving rise to the destruction or fracture of the bump electrode, thus resulting in a shortened reliability life of the semiconductor device (Microelectronic Packaging Handbook, Van Nostrand Reinhold, 1989).
It is known that this reliability life can be improved by reducing the maximum shear strain ".gamma..sub.max " to be generated at the bump electrode as taught by the formula of cycle life represented by: EQU Nf=Cf.sup.1/3 .gamma..sub.max.sup.-2 .multidot.exp(1428/T.sub.max)
(IBM, J. Res. Develop., 13; 251 (1969)). wherein C is a constant; f, the frequency; T.sub.max, the maximum temperature
This maximum shear strain to be generated at the bump electrode can be represented by the following formula: EQU .gamma..sub.max ={1/D.sub.min /2).sup.2/.beta. } (V/.pi.h.sup.1+.beta.).sup.1/.epsilon. .multidot.d.multidot..DELTA.T.multidot..DELTA..alpha.
wherein D.sub.min represents the minimum bump diameter; .beta., a constant peculiar to a material of bump; V, the volume of solder; h, the height of solder; .DELTA..alpha., a difference in coefficient of thermal expansion; .DELTA.T, a difference in temperature; and d, DNP (a distance between the neutral point of the LSI chip and the center of the bump).
Under the circumstances, in the conventional flip-chip mounting technique, the following measures have been taken for reducing the stress to be generated at the bump electrode.
Namely, (1) to minimize the distance between the center of the chip and the center of the bump; (2) to minimize the difference between the CTE (coefficient of thermal expansion) of a semiconductor chip and the coefficient of thermal expansion of a wiring circuit board; (3) to improve the heat dissipation property of the semiconductor device so as to minimize a difference in temperature at the connecting portion of the bump; and (4) to modify the structure of the bump electrode so as to sufficiently absorb a stress distortion generated.
There are also proposed a method of filling a resin 78 into a space between a semiconductor chip 72 and a wiring circuit board 71 as shown in FIG. 2, or a method of sealing a semiconductor chip with silicone gel thereby improving the moisture resistance of the semiconductor chip and at the same time to alleviate a stress to the bump electrode thus improving the cycle life of the device.
However, according to the packaging method of filling a space between a semiconductor chip and a wiring circuit board with a resin (for example, Japanese Patent Unexamined Publication Shou/57-208149 and Japanese Utility Model Unexamined Publication Shou/58-18348), the physical properties of the resin are not specified, so that there has been even a possibility of accelerating the destruction of the bump portion. Namely, if the physical property of the encapsulation resin is not optimized in this case, the circuit board may be warped as shown in FIG. 3, resulting in the peel off of the resin from the surface of the circuit board, or the generation of cracking in the resin. On the other hand, in a method of filling a resin through a pore formed in a glass board in order to smoothly carry out the filling of resin (for example, Japanese Utility Model Unexamined Publication Shou/58-18348 and Japanese Patent Unexamined Publication Shou/58-103143), it is clearly impossible to prevent the peripheral portion of the pore in the glass board from being cracked due to a stress from heat cycle, thus giving rise to a problem in the practical use thereof and at the same time to a problem of uncertainty in reliability of the bump bonding.
If these phenomena would actually happen, the resin may be fractured and the surface of the wiring circuit board may also be destroyed together with the encapsulation resin as shown in FIGS. 4A and 4B. Since a sufficient study on the bonding strength between an encapsulation resin and a semiconductor chip, or between an encapsulation resin and a wiring circuit board has been neglected up to date, the fractures of the encapsulation resin as well as the wiring circuit board that can be brought about as a result of heat cycle have become an important problem in a semiconductor device.
There is also proposed under the circumstances a packaging method wherein a region 81 encircled by a semiconductor chip 72, a wiring circuit board 71 and a bump electrode 73 is not filled with a resin as shown in FIG. 5 so as to improve the reliability of the bump bonding (for example, Japanese Patent Unexamined Publications Shou/58-204546; Shou/57-208149 and Shou/58-134449). In this case however, water may be accumulated in the space 81, corroding the bump electrode 73.
There has been also proposed a method of improving the reliability of an assembled structure of semiconductor apparatus, wherein only an outside portion of the array bump bonding is sealed with an insulating material, leaving other portions unsealed with the insulating material (see Japanese Patent Unexamined Publications Shou/61-177738). However, it is difficult to sufficiently alleviate the stress on the bump electrode especially when an organic high molecular substrate exhibiting a large degree of difference in coefficient of thermal expansion is employed as a circuit board.
There has been also proposed to employ a soft resin for filling a space between a semiconductor chip and a wiring circuit board (Japanese Patent Unexamined Publications Shou/58-10841). However, since such a soft resin is very large in coefficient of thermal expansion, the heat cycle life of the bump bonding would not be sufficiently improved.
In order to solve these problems, there is also proposed to select suitable ranges of physical property and composition of a resin thereby to improve the heat cycle life of the bump bonding (for example, Japanese Patent Publication Hei/4-51057, Japanese Patent Unexamined Publication Shou/63-316447 and Japanese Patent Unexamined Publication Hei/4-219944). This method is effective in particular when a semiconductor chip of relatively small scale is to be mounted on a circuit board.
In a method of filling a resin in a space between a semiconductor chip and a wiring circuit board, it has been a common practice to coat the surface of the semiconductor chip or a semiconductor chip-mounting portion of the wiring circuit board with a resin before bonding thereof through a bump is carried out (for example, Japanese Patent Unexamined Publications Hei/4-7447 and Japanese Patent Unexamined Publication Hei/2-234447). There is also proposed to coat in advance a portion of a circuit board excluding the portion where a bump is to be attached with a suitable amount of an encapsulation resin, and then after a semiconductor chip is assembled with the circuit board, the rest of the encapsulation resin is filled in a space between the semiconductor chip and the circuit board (Japanese Patent Unexamined Publication Shou/62-132331).
Further, a method of filling a resin in a space between a semiconductor chip and a wiring circuit board by making the most of capillarity after the semiconductor chip is mounted through a flip-chip packaging on a wiring circuit board has been practiced (Japanese Patent Unexamined Publications Shou/60-147140 and Hei/3-18435). According to this method, it is possible to fill a resin in a narrow space with a thickness ranging from 20 .mu.m to 50 .mu.m after lowering the viscosity of the resin by heating it to less than the curing temperature thereof.
However, this method of utilizing a capillarity for filling a resin into a space may not be applicable to a semiconductor chip of larger size, since the filling of a resin may become difficult.
By the way, the inflow velocity of a resin can be represented by a formula: V=1200 h/(.mu.L) (wherein h is a dimension of gap; .mu. is a viscosity (poise); and L is a distance of inflow). Namely, the inflow velocity of a resin is proportional to the distance between a semiconductor chip and a wiring circuit board (a gap size), and is inversely proportional to the viscosity of resin as well as to the size of the semiconductor chip. Therefore, some measures such as the lowering in viscosity of a resin or the enlargement of gap are required to be taken if the method is to be applied to a semiconductor chip which is larger in size.
A filler should preferably be added to a resin in order to minimize a difference between the coefficient of thermal expansion of a semiconductor chip and that of a wiring circuit board. However, the addition of a filler into a resin may cause an increase in viscosity of the resin. The coefficient of thermal expansion and elastic modulus of a resin changes with a change in content of a filler as shown in FIG. 6. Namely, as the content of a filler is increased, the coefficient of thermal expansion of a resin decreases, but the elastic modulus thereof increases on the contrary.
On the other hand, the dimension of the gap is equal to the height of the bump attached between a semiconductor chip and a wiring circuit board. Since the shape of the bump is spherical at the moment when the molten bump is attached onto a wiring circuit board, it is impossible to increase the height of the bump more than the diameter of the spherical shape thereof. Thus, there is a limit in the height of the bump, so that it is difficult to enlarge the gap between a semiconductor chip and the wiring circuit board so as to make easier the filling of a resin.
There is further proposed a method to cover the surface of a resin covering a semiconductor chip with a different kind of resin as shown in FIG. 7 (Japanese Patent Unexamined Publication Hei/4-171970). However, this method is accompanied with a problem that an impurity may be intruded into an interface between these resins, or a stress may be generated at the interface due to a residual stress between these resins, thus causing a peeling of the resins.
By the way, the inflow velocity of a resin is greatly lowered as the inflow distance of resin becomes large as shown in FIG. 8. The curve shown in FIG. 8 represents results measured on five kinds of resins differing in viscosity, i.e. 10 to 100 poise by setting a distance (a gap) between a semiconductor chip and a wiring circuit board to 0.5 mm.
When a resin is injected into a space between a semiconductor chip and a wiring circuit board, the resin 86 flows not only into the space between the semiconductor chip 84 and the circuit board 83, but also around the semiconductor chip 84. The velocity of the resin flow at the center of the semiconductor chip is larger as compared with that at the periphery of the semiconductor chip, so that air bubble 87 may be caused to generate as shown in FIG. 9D.
Japanese Patent Unexamined Publication Shou/63-245942 sets forth a structure wherein a coating layer is formed around a semiconductor chip while exposing bumps, thus forming the active element portion of the semiconductor into a hollow shape. In this structure however, the gap between the semiconductor chip and the wiring circuit board at the bump bonding portion becomes smaller than the height of the bump so that the filling of a resin becomes more difficult.
It is preferable for the alleviation of stress to a bump electrode connecting a semiconductor chip with a wiring circuit board to fill a resin having a small coefficient of thermal expansion in a space between the semiconductor chip and the wiring circuit board. Therefore, a resin containing a large amount of filler so as to minimize the coefficient of thermal expansion and at the same time to enlarge the elastic modulus has been employed for filling a space between the semiconductor chip and the wiring circuit board. A higher content of filler in a resin is also preferable in view of shielding water. Moreover, the larger the particle size of the filler is, the higher the water-shielding effect becomes.
However, in the recent trend of increase in size of a semiconductor chip, there have been raised many new problems which can not be solved by the employment of the conventional resins, thus making it increasingly difficult to assure the reliability of a semiconductor device. Namely, since the viscosity of a resin becomes higher as the content of a filler is increased, making it impossible to fill the resin into a space between the semiconductor chip and the wiring circuit board. When the viscosity of a resin is too low on the contrary, the following problems will be raised. Due to the high fluidity of the resin, the resin may excessively spread over a wide range of area around a semiconductor chip (Japanese Patent Unexamined Publications Hei/4-219944). If the spreading of a resin formed around a semiconductor chip is excessive, neighboring resins may be overlapped to each other, thus forming a resin layer of non-uniform thickness between the neighboring semiconductor chips as shown in FIG. 10A, resulting in the generation of a non-uniformity of stress, whereby lowering the reliability of the product. These problems become more serious in MCM (Multichip Module) where a plurality of semiconductor chips are mounted.
If a space between the neighboring semiconductor chips is increased in advance in the mounting of semiconductor chips by taking account of the spreading of resin formed around the semiconductor chips, it is impossible to realize a flip-chip mounting in high density of semiconductor chips. On the other hand, even if a plurality of semiconductor chips are closely disposed and the sealing en bloc of these semiconductor chips with a resin is tried as shown in FIG. 10B, it would be impossible to perform the sealing through capillarity due not only to a large area to be sealed, but also to a small gap between the semiconductor chips. As a result, it would be impossible to perform the sealing en bloc.
Meanwhile, when a semiconductor chip provided with a plurality of bump electrodes at a narrow pitch is to be mounted through a flip-chip mounting, it is impossible to allow a resin to pass through a space between neighboring bump electrodes at the occasion of injecting the resin into a space between the semiconductor chip and the wiring circuit board, hence the realization of a uniform resin sealing including a region at the periphery of the semiconductor chip would become difficult.
With respect to a resin containing a filler having an excessively large particle size, it is impossible to flow such a resin into the internal region inside the bump electrodes, since it is no more possible to conform with the miniaturized pitch of the bump electrodes. Moreover, even if the filler mixed in a resin is of a size which is capable of being introduced into the internal region through the space between bump electrodes, there is a possibility that the filler may pass through the passivation film of a semiconductor chip to destroy the semiconductor chip.